3932, katalog
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3932
PRELIMINARY INFORMATION
(Subject to change without notice)
January 15, 2003
THREE-PHASE POWER
MOSFET CONTROLLER
GHC
5
29
SENSE
The A3932SEQ is a three-phase MOSFET controller for use with
bipolar brushless dc motors. Its high gate-current drive capability
allows driving a wide range of n-channel power MOSFETs and can
support motor supply voltages to 50 V. Bootstrapped high-side drive
blocks provide the floating positive supplies for the gate drive and
minimize the component count normally required. The high-side
circuitry also employs a unique FET monitoring circuit that ensures the
gate voltages are at the proper levels before turn-on and during the ON
cycle.
Internal fixed off-time PWM current-control circuitry can be used to
regulate the maximum load current to a desired value. The peak load-
current limit is set by the user’s selection of an input reference voltage
and external sensing resistor. The fixed off-time pulse duration is set
by a user-selected external RC timing network. For added flexibility,
the PWM input can be used to provide speed/torque control, allowing
the internal current control circuit to set the maximum current limit.
continued ...
CC
6
28
RC
GLB
7
27
PWM
SB
8
26
TACH
GHB
9
25
SR
CB
10
24
BRAKE
GLA
11
19
DIR
SA
12
22
H2
GHA
13
21
H3
Dwg. PP-068-1
FEATURES
AND
BENEFITS
Drives Wide Range of N-Channel MOSFETs
Synchronous Rectification
ABSOLUTE MAXIMUM RATINGS
at T
A
= 25
Power MOSFET Protection
C
Adjustable Dead Time for Cross-Conduction Protection
Supply Voltage, V
BB
.............................
50 V
Peak Regulator Voltage, V
REG
..............
15 V
Logic Input Voltage Range,
V
IN
..................
-0.3 V to V
LCAP
+ 0.3 V
Sense Voltage Range,
V
SENSE
.............................
-5 V to +1.5 V
Output Voltage Range,
V
SA
, V
SB
, V
SC
..................
-5 V to +50 V
V
GHA
, V
GHB
, V
GHC
.
-5 V to V
BB
+ 17 V
V
CA
, V
CB
, V
CC
.....................
V
SX
+ 17 V
Operating Temperature Range,
T
A
.................................
-20
100% Duty Cycle Operation
Selectable Fast or Slow Current-Decay Modes
Internal PWM Peak Current Control
High-Current Gate Drive
Motor Lead Short-to-Ground Protection
Internal 5-V Regulator
Brake Input
PWM Torque-Control Input
Fault-Diagnostic Output
Tachometer Output
C to +85
C
Thermal Shutdown
Junction Temperature, T
J
.................
+150
C
Undervoltage Protection
Storage Temperature Range,
T
S
...............................
-55
C to +150
C
Always order by complete part number:
A3932SEQ
.
23
3932
THREE-PHASE POWER
MOSFET CONTROLLER
Functional Block Diagram
+V
VBB
+
LCAP
5 V
REGULATOR
VREG
+
50 k
Ω
(9)
UNDER-
VOLTAGE
DETECT
CHARGE
PUMP
C
X
H1
H2
H3
C
boot
TURN-ON
DELAY
HIGH-SIDE
DRIVER
GH
X
TACH
O.D.
TO
1 OF 3
MOTOR
PHASES
BRAKE
DIR
RESET
MODE
PWM
SR
CONTROL
LOGIC
S
X
DRIVER
PROTECTION
LOGIC
1 OF 3 HIGH-SIDE DRIVERS
DEAD-TIME
ADJUST
DEAD
TO
LCAP
RC
RC BLANKING
(FIXED OFF TIME)
TURN-ON
DELAY
LOW-SIDE
DRIVER
GL
X
R
T
C
T
1 OF 3 LOW-SIDE DRIVERS
PGND
R
S
SHORT-TO-GROUND
TSD
INVALID HALL
V
REG
UNDERVOLTAGE
O.D.
FAULT
TO
LCAP
REF
AGND
SENSE
Dwg. FP-045-1
Optional synchronous rectification is included. This
feature will short out the current path through the power
MOSFETs’ reverse body diodes during the PWM off-
cycle current decay. This can minimize power dissipation
in the power MOSFETs, eliminate the need for external
power clamp diodes, and potentially allow a more eco-
nomical choice for the MOSFET drivers.
The A3932 includes the commutation logic for Hall
sensors configured for 120 degree spacing. Power
MOSFET protection features include bootstrap capacitor
charging current monitor, undervoltage monitor, motor-
lead short-to-ground, and thermal shutdown.
The ‘S–’ part-number suffix indicates an operating
temperature range of -20
NOTE — For 12 V applications, VBB is shorted to
VREG. The V
REG
absolute maximum rating (15 V) must
not be exceeded.
C. The ‘–EQ’ suffix
indicates a 32-lead rectangular (9 x 7) plastic chip carrier
(quad pack) for minimum-area, surface-mount applica-
tions.
C to +85
2
115 Northeast Cutoff, Box 15036
Worcester, Massachusetts 01615-0036 (508) 853-5000
Copyright © 2002, 2003 Allegro MicroSystems, Inc.
3932
THREE-PHASE POWER
MOSFET CONTROLLER
ELECTRICAL CHARACTERISTICS: unless otherwise noted at T
A
= 25
C; V
BB
= 18 V to 50 V; C
LCAP
,
C
boot
= 0.1
F; C
REG
= 10
F; C
load
= 3300 pF
;
f
PWM
= 22.5 kHz Square Wave; Two Phases Active.
Limits
Parameter
Symbol Conditions
Min Typ Max Units
Supply Current
Quiescent Current
I
BB
RESET high, coast mode, stopped – – 8.0 mA
Reference Voltage
V
LCAP
I
LCAP
= -3 mA
4.75 5.0 5.25 V
Output Voltage
V
REG
V
BB
= V
REG
15 V, I
REG
= -10 mA 10.8 – 13.2 V
18 V
V
BB
50 V, I
REG
= -10 mA 12.4 13 13.6 V
Output Voltage Regulation
V
REG(
∆
IREG)
I
REG
= -1 to -30 mA, coast
– 25 – mV
V
REG(
∆
VBB)
I
REG
= -10 mA, coast
– 40 – mV
Digital Logic Levels
Logic Input Voltage
V
IH
All inputs except SR
2.0 – – V
SR input only
3.0 – – V
V
IL
All inputs except SR
– – 0.8 V
SR input only
– – 1.8 V
Logic Input Current
I
IH
V
IH
= 2 V
-30 – -90
A
I
IL
V
IL
= 0.8 V
-50 – -130
A
Gate Drive
Low-Side Output Voltage
V
GLxH
I
GLx
= 0
V
REG
- 0.8 V
REG
- 0.5 – V
High-Side Output Voltage
V
GHxH
I
GHx
= 0
10.4 11.6 12.8 V
Pulldown Switch Resistance r
DS(on)
I
GLx
= 50 mA
– 4.0 –
Pullup Switch Resistance
r
DS(on)
I
GHx
= -50 mA
– 14 –
Low-Side Output
t
rGLx
10% to 90%, with C
load
– 120 – ns
Switching Time
t
fGLx
90% to 10%, with C
load
– 60 – ns
High-Side Output
t
rGHx
10% to 90%, with C
load
– 120 – ns
Switching Time
t
fGHx
90% to 10%, with C
load
– 60 – ns
Propagation Delay Time
t
pr
GHx, GLx rising, C
load
= 0
– 220 – ns
(PWM to gate output)
t
pf
GHx, GLx falling, C
load
= 0
– 110 – ns
Maximum Dead Time
t
dead
GHx to GLx, V
DEAD
= 0 V, C
load
= 0 3.5 5.6 7.6
s
Minimum Dead Time
t
dead
GLx to GHx, I
DEAD
= 780
A, C
load
= 0 50 100 150 ns
Continued —
NOTES: 1. Typical Data is for design information only.
2. Negative current is defined as coming out of (sourcing) the specified device terminal.
www.allegromicro.com
3
3932
THREE-PHASE POWER
MOSFET CONTROLLER
ELECTRICAL CHARACTERISTICS: unless otherwise noted at T
A
= 25
C; V
BB
= 18 V to 50 V; C
LCAP
,
C
boot
= 0.1
F; C
REG
= 10
F; C
load
= 3300 pF
;
f
PWM
= 22.5 kHz Square Wave; Two Phases Active.
Limits
Parameter
Symbol Conditions
Min Typ Max Units
Bootstrap Capacitor
Bootstrap Charge Current
I
Cx
100 – – mA
Bootstrap Output Voltage
V
Cx
V
Sx
= 0, I
Cx
= 0, V
REG
= 13 V
10.4 11.6 12.8 V
Bootstrap Resistance
r
Cx
I
Cx
= -50 mA
– 9.0 12
Current Limit Circuitry
Input Offset Voltage
V
io
0 V
V
IC
1.5 V
– –
5.0 mV
SENSE Input Current
I
SENSE
V
IC
0 V, V
ID
1.5 V
– -25 –
A
REFERENCE Input Current I
REF
V
IC
0 V, V
ID
1.5 V
– 0 –
A
Blank Time
t
blank
R
T
= 56 k
, C
T
= 470 pF
– 0.91 –
s
RC Charge Current
I
RC
-0.9 -1.0 -1.1 mA
RC Voltage Threshold
V
RCL
1.0 1.1 1.2 V
V
RCH
2.7 3.0 3.3 V
Protection Circuitry
Bootstrap Charge Threshold I
Cx
– -9.0 – mA
Motor Short-to-Ground Monitor V
DSH
V
BB
- V
SX
, high side on
1.3 2.0 2.7 V
Undervoltage Threshold
UVLO Increasing V
REG
9.2 9.7 10.2 V
Decreasing V
REG
8.6 9.1 9.6 V
FAULT Output Voltage
V
FAULT
I
O
= 1 mA
– – 0.5 V
TACH Output Voltage
V
TACH
I
O
= 1 mA
– – 0.5 V
TACH Output Pulse Width
t
TACH
I
O
= 1 mA, C
TACH
= 50 pF
– 0.75 –
s
Thermal Shutdown Temp.
T
J
– 165 –
C
Thermal Shutdown Hysteresis
T
J
– 10 –
C
Thermal Resistance
R
θ
JA
High K board per JEDEC JESD51-7 – 37 –
C/W
NOTES: 1.Typical Data is for design information only.
2.Negative current is defined as coming out of (sourcing) the specified device terminal.
4
115 Northeast Cutoff, Box 15036
Worcester, Massachusetts 01615-0036 (508) 853-5000
3932
THREE-PHASE POWER
MOSFET CONTROLLER
Terminal Descriptions
Terminal Name
1 PGND
2 RESET
3 GLC
4 SC
5 GHC
6 CC
7 GLB
8 SB
9 GHB
10 CB
11 GLA
12 SA
13 GHA
14 CA
15 VREG
16 LCAP
17 FAULT
18 MODE
19 VBB
20 H1
21 H3
22 H2
23 DIR
24 BRAKE
25 SR
26 TACH
27 PWM
28 RC
29 SENSE
30 REF
31 DEAD
32 AGND
RESET
— A logic input used to enable the device, internally
pulled up to V
LCAP
(+5 V). A RESET = 1 will disable the
device and force all gate drivers to 0 V, coasting the motor. A
RESET = 0 allows the gate drive to follow the commutation
logic. The RESET = 1 overrides BRAKE.
GLA/GLB/GLC
— Low-side, gate-drive outputs for external
NMOS drivers. External series-gate resistors (as close as
possible to the NMOS gate) can be used to control the slew rate
seen at the power-driver gate, thereby controlling the di/dt and
dv/dt of the SA/SB/SC outputs. GLx = 1 (or “high”) means that
the upper half (PMOS) of the driver is turned on and its drain
will source current to the gate of the low-side FET in the
external motor-driving bridge. GLx = 0 (or “low”) means that
the lower half (NMOS) of the driver is turned on and its drain
will sink current from the external FET’s gate circuit.
SA/SB/SC
— Directly connected to the motor, these terminals
sense the voltages switched across the load. These terminals
are also connected to the negative side of the bootstrap capaci-
tors and are the negative supply connections for the floating
high-side drivers.
GHA/GHB/GHC
— High-side, gate-drive outputs for external
NMOS drivers. External series-gate resistors can be used to
control the slew rate seen at the power-driver gate, thereby
controlling the di/dt and dv/dt of the SA/SB/SC outputs.
GHx = 1 (or “high”) means that the upper half (PMOS) of the
driver is turned on and its drain will source current to the gate
of the high-side FET in the external motor-driving bridge. GHx
= 0 (or “low”) means that the lower half (NMOS) of the driver
is turned on and its drain will sink current from the external
FET’s gate circuit.
CA/CB/CC
— High-side connections for the bootstrap capaci-
tors, positive supply for high-side gate drivers. The bootstrap
capacitors are charged to approximately V
REG
when the
associated output Sx terminal is low. When the output swings
high, the voltage on this terminal rises with the output to
provide the boosted gate voltage needed for n-channel power
MOSFETs.
continued next page
www.allegromicro.com
5
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