3973, katalog

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3973
PRELIMINARY INFORMATION
(Subject to change without notice)
December 1, 2000
DUAL DMOS FULL-BRIDGE MICRO-
STEPPING PWM MOTOR DRIVER
VCP
1
24
OSC
1 A and operating voltages to
35 V. Internal fixed off-time PWM current-control timing circuitry can
be programmed via a serial interface to operate in slow, fast, and mixed
current-decay modes. The A3973SB (DIP) and the A3973SLB (SOIC)
are electrically identical and differ only in package style.
The desired load-current level is set via the serial port with two 6-bit
linear DACs in conjunction with a reference voltage. The six bits of
control allow maximum flexibility in torque control for a variety of step
methods, from microstepping to full-step drive. Load current is set in
1.56% increments of the maximum value.
Synchronous rectification circuitry allows the load current to flow
through the low
r
DS(on)
of the DMOS output driver during the current
decay. This feature will eliminate the need for external clamp diodes in
most applications, saving cost and external component count, while
minimizing power dissipation.
Internal circuit protection includes thermal shutdown with hyster-
esis, transient-suppression diodes, and crossover-current protection.
Special power-up sequencing is not required.
The A3973SB is supplied in a 24-lead plastic DIP with a copper
batwing power tab; the A3973SLB is supplied in a 24-lead plastic SOIC
with a copper batwing power tab for surface-mount applications. The
power tabs are at ground potential and need no electrical isolation.
±
CP1
2
23
SLEEP
CP2
3
22
V
REG
OUT
1B
4
21
OUT
2B
LOAD
SUPPLY
1
5
V
BB1
V
BB2
20
LOAD
SUPPLY
2
GROUND
6
19
GROUND
GROUND
7
18
GROUND
SENSE
1
8
17
SENSE
2
OUT
1A
9
9
16
OUT
2A
STROBE
10
V
DD
15
LOGIC
SUPPLY
CLOCK
11
14
MUX
DATA
12
13
REF
Dwg. PP-069-3
C
Load Supply Voltage, V
BB
................
35 V
Output Current, I
OUT
......................
°
1.0 A
Logic Supply Voltage, V
DD
..............
7.0 V
Logic Input Voltage Range,
V
IN
................
-0.3 V to V
DD
+ 0.3 V
Reference Voltage, V
REF
.....................
3 V
Sense Voltage (dc), V
S
................
500 mV
Package Power Dissipation, P
D
A3973SB ...............................
3.1 W
A3973SLB ............................
2.2 W
Operating Temperature Range,
T
A
..........................
-20
±
1 A, 35 V Continuous Output Rating
Low
r
DS(on)
DMOS Output Drivers
Optimized Microstepping via 6-Bit Linear DACs
Programmable Mixed, Fast, and Slow Current-Decay Modes
4 MHz Internal Oscillator for Digital Timing
Serial-Interface Controls Chip Functions
°
C to +85
°
C
Synchronous Rectification for Low Power Dissipation
Junction Temperature, T
J
.............
+150
°
C
Internal UVLO and Thermal Shutdown Circuitry
Storage Temperature Range,
T
S
.........................
-55
Crossover-Current Protection
°
C to +150
°
C
Precision 2 V Reference
Output current rating may be limited by duty
cycle, ambient temperature, and heat sinking.
Under any set of conditions, do not exceed the
specified current rating or a junction tempera-
ture of 150
Inputs Compatible with 3.3 V or 5 V Control Signals
Sleep and Idle Modes
°
C.
Always order by complete part number, e.g.,
A3973SB
.
Designed for pulse-width modulated (PWM) current control of
bipolar microstepping stepper motors, the A3973SB and A3973SLB are
capable of continuous output currents to
ABSOLUTE MAXIMUM RATINGS
at T
A
= +25
FEATURES
±
3973
DUAL DMOS FULL-BRIDGE
MICROSTEPPING PWM MOTOR DRIVER
FUNCTIONAL BLOCK DIAGRAM
0.22
µ
F
0.22
µ
V
REG
CP2
CP1
22
3
2
LOGIC
SUPPLY
2 V
LOAD
SUPPLY
V
CP
UVLO AND
FAULT
DETECT
REGULATOR
CHARGE PUMP
1
15
V
DD
BANDGAP
0.22
µ
F
V
BB1
5
MUX
14
6-BIT
LINEAR
DAC
DMOS H-BRIDGE
SENSE
1
V
CP
+-
6
OUT
1A
9
OSCILATOR
PROGRAMMABLE
PWM TIMER
FIXED-OFF
BLANK
MIXED DECAY
OUT
1B
4
OSC
OSC SELECT/
DIVIDER
24
SENSE
1
8
CLOCK
11
DATA
12
SERIAL
PORT
CONTROL
LOGIC
GATE
DRIVE
0.1
µ
F
DMOS H-BRIDGE
PHASE 1/2
SYNC. RECT. MODE
SYNC. RECT. DISABLE
MODE 1/2
20
STROBE
10
V
BB2
SLEEP
23
OUT
2A
16
PROGRAMMABLE
PWM TIMER
FIXED-OFF
BLANK
MIXED DECAY
OUT
2B
2 V
21
6
REF
13
BUFFER
+-
6-BIT
LINEAR
DAC
SENSE
2
17
0.1
µ
F
GROUND
6 7
18 19
Dwg. FP-050-1
2
115 Northeast Cutoff, Box 15036
Worcester, Massachusetts 01615-0036 (508) 853-5000
Copyright © 2000, Allegro MicroSystems, Inc.
F
3973
DUAL DMOS FULL-BRIDGE
MICROSTEPPING PWM MOTOR DRIVER
ELECTRICAL CHARACTERISTICS at T
A
= +25
°
C, V
BB
= 35 V, V
DD
= 5.0 V, V
S
= 0.5 V,
f
PWM
< 50 kHz (unless otherwise noted).
Limits
Characteristic
Symbol Test Conditions
Min. Typ. Max. Units
Load Supply Voltage Range
V
BB
Operating
15
—
35
V
During sleep mode
0
—
35
V
Logic Supply Voltage Range
V
DD
Operating
4.5
5.0
5.5
V
Load Supply Current
I
BB
f
PWM
< 50 kHz
—
—
8.0
mA
Operating, outputs disabled
—
—
6.0
mA
Sleep or idle mode
—
—
20
µ
A
Logic Supply Current
I
DD
f
PWM
< 50 kHz
—
—
12
mA
Outputs off
—
—
10
mA
Idle mode (D0 = 1, D18 = 0)
—
—
1.5
mA
Sleep mode
—
—
100
µ
A
Output Drivers
Output Leakage Current
I
DSS
V
OUT
= V
BB
—
<1.0
50
µ
A
V
OUT
= 0 V
—
<-1.0
-50
µ
A
Output On Resistance
r
DS(on)
Source driver, I
OUT
= –1.0 A
—
0.54 0.60
Ω
Sink driver, I
OUT
= 1.0 A
—
0.54 0.60
Ω
Body Diode Forward Voltage
V
F
Source diode, I
F
= 1.0 A
—
—
1.2
V
Sink diode, I
F
= 1.0 A
—
—
1.2
V
Control Logic
Logic Input Voltage
V
IN(1)
2.0
—
—
V
V
IN(0)
——0.8
V
Logic Input Current
I
IN(1)
V
IN
= 2.0 V
—
<1.0
20
µ
A
I
IN(0)
V
IN
= 0.8 V
—
<-2.0
-20
µ
A
OSC Input Frequency Range
f
OSC
Divide by one
2.5
—
6.0
MHz
(D0 =1, D13 = 0, D14 = 1)
OSC Input Duty Cycle
—
40
—
60
%
Input Hysterisis
∆
V
IN
0.20
—
0.40
V
continued next page ...
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3
3973
DUAL DMOS FULL-BRIDGE
MICROSTEPPING PWM MOTOR DRIVER
ELECTRICAL CHARACTERISTICS at T
A
= +25
°
C, V
BB
= 35 V, V
DD
= 5.0 V, V
S
= 0.5 V,
f
PWM
< 50 kHz (unless otherwise noted).
Limits
Characteristics
Symbol Test Conditions
Min. Typ. Max. Units
Control Logic (continued)
Internal Oscillator
f
OSC
OSC shorted to ground
3.0
4.0
5.0
MHz
R
OSC
= 51 k
Ω
3.4
4.0
4.6
MHz
DAC Accuracy (total error)
E
T
Relative to DAC reference buffer
—
±
1/2
—
LSB
output, D0 = 0, D17 = 0
Reference Input Voltage Range V
REF(EXT)
0.5
—
2.6
V
Reference Buffer Offset
V
OS
—
±
10
—
mV
Reference Divider Ratio
V
REF
/V
S
D0 = 0, D18 = 0
—
8.0
—
—
D0 = 0, D18 = 1
—
4.0
—
—
Reference Input Current
I
REF
V
REF
= 2.0 V
—
—
±
0.5
µ
A
Internal Reference Voltage
V
REF(INT)
1.94
2.0
2.06
V
Gain (G
m
) Error (note 3)
E
G
D0 = 0, D17 = 0,
D18 = 0, DAC = 63
—
0
±
6
%
D18 = 0, DAC = 31
—
0
±
9
%
D18 = 1, DAC = 63
—
0
±
6
%
D18 = 1, DAC = 15
—
0
±
10
%
Comparator Input Offset Voltage
V
IO
V
REF
= 0 V
—
±
5.0
—
mV
Propagation Delay Times
t
pd
50% to 90%:
PWM change to source on
500
800 1200
ns
PWM change to source off
50
150
350
ns
PWM change to sink on
500
800 1200
ns
PWM change to sink off
50
150
350
ns
Crossover Dead Time
t
dt
300
700
900
ns
Thermal Shutdown Temperature
T
J
—
165
—
°
C
Thermal Shutdown Hysteresis
∆
T
J
—15
—
°
C
UVLO Enable Threshold
V
UVLO
Increasing V
DD
3.9
4.2
4.45
V
UVLO Hysteresis
∆
V
UVLO
0.05 0.10
—
V
NOTES: 1. Typical Data is for design information only.
2. Negative current is defined as coming out of (sourcing) the specified device terminal.
3. E
G
= [(V
REF
/Range) – V
S
]/(V
REF
/Range).
4
115 Northeast Cutoff, Box 15036
Worcester, Massachusetts 01615-0036 (508) 853-5000
3973
DUAL DMOS FULL-BRIDGE
MICROSTEPPING PWM MOTOR DRIVER
FUNCTIONAL DESCRIPTION
Serial Interface.
The A3973SB/SLB is controlled via a
3-wire (clock, data, strobe) serial port. The programmable
functions allow maximum flexibility in configuring the PWM to
the motor drive requirements. The serial data is written as two
19-bit words: 1 bit to select the word and 18 bits of data. The
serial data is clocked in starting with D18.
D13 Bridge 1 Phase.
This bit controls the direction of
output current for Load 1.
D13 OUT
1A
OUT
1B
0
L
H
1
H
L
Word 0 Bit Assignments
D14 Bridge 2 Phase.
This bit controls the direction of
output current for Load 2.
D14 OUT
2A
Bit
Function
OUT
2B
D0
Word select = 0
D1
Bridge 1, DAC, LSB
0
L
H
D2
Bridge 1, DAC, bit 2
1
H
L
D3
Bridge 1, DAC, bit 3
D15 Bridge 1 Mode.
D15
D4
Bridge 1, DAC, bit 4
D5
Bridge 1, DAC, bit 5
Mode
D6
Bridge 1, DAC, MSB
0
Mixed-decay
D7
Bridge 2, DAC, LSB
1
Slow-decay
D8
Bridge 2, DAC, bit 2
D9
Bridge 2, DAC, bit 3
D16 Bridge 2 Mode.
D16
D10
Bridge 2, DAC, bit 4
Mode
D11
Bridge 2, DAC, bit 5
0
Mixed-decay
D12
Bridge 2, DAC, MSB
1
Slow-decay
D13
Bridge 1 phase
D14
Bridge 2 phase
D17 REF Select.
This bit determines the reference input for
the 6-bit linear DACs.
D17
D15
Bridge 1 mode
D16
Bridge 2 mode
Reference Voltage
D17
REF select
D18
Range select
0
Internal 2 V
1
External (3 V max)
D1 – D6 Bridge 1 Linear DAC.
Six-bit word sets desired
current level for Bridge 1. Setting all six bits to zero disables
Bridge 1, with all drivers off (See current regulation section of
functional description).
D18 G
m
Range Select.
This bit determines the scaling factor
(4 or 8) used.
D18 Divider Load Current
0
D7 – D12 Bridge 2 Linear DAC.
Six-bit word sets desired
current level for Bridge 2. Setting all six bits to zero disables
Bridge 2, with all drivers off (See current regulation section of
functional description).
1/8
I
TRIP
= V
DAC
/8R
S
1
1/4
I
TRIP
= V
DAC
/4R
S
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5
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